As electronic device development continues to advance, the speeds of high speed serial links are approaching 20 Gbits/sec (gigabits per second). Examples include the USB™ (Universal Serial Bus) speeds of 10 GT/sec (giga-transfers per second), Thunderbolt Lightning technology reaching 20 GT/sec, and other developing technologies.
However, these speeds create new challenges because testing individual components that communicate with each other using these high-speed serial connect technologies in isolation generally is not a viable option. At these high speeds, the board interconnect margins, the impact of leading processes (14 nm, 10 nm) on signal eye width and height, and temperature impact on the margins all play crucial roles in reliable communication, thereby complicating the testing operation.